Senior Design Verification Engineer - Memory Controller IP

Job description

Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Senior/Lead Design Verification Engineer to join our Memory Controller IP team in Hillsboro, Oregon. The successful candidate will participate in pre-silicon RTL Verification activities related to Memory Controller SoftIP development, on leading-edge DDR, HBM, and GDDR DRAM controller technologies. This is a Full Time position, reporting to the local onsite manager of the Memory Controller IP Verification team . Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite while also allowing for two days of remote work. Responsibilities: - Testbench and test sequence development for verification of new controller technologies and features - Functional coverage planning, coverage item coding, and test suite augmentation to achieve Functional Coverage - Regression test development, monitoring, debug/triage, and correction to test environment, sequences, debug of controller RTL design - Development & support of Verification environment scripting and capa...