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HSIO Functional and Power Management Engineer

NVIDIA · Santa Clara, California, US

NVIDIA Silicon Co-Design Group is seeking a versatile engineer to be part of the HW ArchDev team. The SSG team is uniquely positioned to have an end-to-end v...

Job description

NVIDIA Silicon Co-Design Group is seeking a versatile engineer to be part of the HW ArchDev team. The SSG team is uniquely positioned to have an end-to-end view of the product development cycle - from early arch definition, through bringup, to product release. Our ArchDev arm is a hub for all silicon and system-level feature development, cost-benefit analysis, system integration solutions, and system POR alignment. As a member of this team, you will dive into next-gen high-speed interconnects like NVLink and NVLink-C2C to make advancements in efficiency and stability. This position offers the opportunity to have a real impact in a dynamic, technology-focused company, impacting product lines ranging from artificial intelligence to consumer graphics to self-driving cars and more. What you’ll be doing: Contribute to the design of the next generation of high-speed IOs, including NVLink and NVLink-C2C. Responsible for IO power optimizations and continuing to push energy efficiency. Ensure interoperability with connected devices and system components in complex interconnect topologies Deep dive into technically challenging HSIO bugs and help drive debug efforts across various teams Work...