Senior Design Technology Co-Optimization Engineer

Job description

Minimum qualifications: - Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. - 5 years of experience in physical design (RTL-to-GDS) or technology development, focusing on advanced nodes (e.g., 7nm, 5nm, or below). - Experience with industry-standard Place and Route (P&R) tools and Static Timing Analysis (STA) tools. - Experience in scripting and automation using Tcl and Python (or Perl) to manage design sweeps and data extraction. - Experience in CMOS device physics, FinFET/nanosheet architectures, and the impact of layout parasitics on PPA. Preferred qualifications: Experience in scripting and automation using Tcl and Python (or Perl) to manage design sweeps and data extraction. - Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture. - 10 years of experience in design technology co-optimization, including standard cell library characterization, metal stack optimization, and evaluation of scaling boosters (e.g., backside power delivery). - Experience working with major foundry technology files (PDKs) and interpre...