Principal Functional Verification Engineer
Openchip & Software Technologies · Rome, Lazio, IT
The Role: As a Functional Verification Principal Engineer, you will be interfacing with architecture, de-sign, physical implementation and software teams in...
Job description
The Role: As a Functional Verification Principal Engineer, you will be interfacing with architecture, de-sign, physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work will involve high-level modelling, UVM, HW/SW Co-Debug, Simulation Acceleration support. Key Responsibilities: - Reading and analysing the system requirements and architecture requirement documents. - Developing detailed Test and Coverage plans based on the Architecture and Micro-architec-ture. - Developing Verification Methodology, ensuring scalability and portability across environ-ments. - Developing Verification environment development and maintenance in SystemVeri-log/UVM/SystemC/C++, including all the respective components such as Stimulus, Checkers, Assertions, Trackers, and Coverage. - Executing Verification Plans, including Design Bring-up, DV environment Bring-up, Regres-sions and Debug of the test failures. - Using the standard tools and flows of the verification process (Simulators, Coverage Analyz-ers, Unix, Continuous Integration, Bug Tracking, …). - Create and execute testcases to verify the functionality, performance, and robustne...