Principal Engineer, PCIe Verification (AI2441)

Job description

Job Title: Principal Engineer, PCIe Verification Job Location: San Jose, CA ( This position requires a full-time, on-site presence in our San Jose, CA office ) Job ID: AI2441 Description: The Design Verification (DV) engineer at SiMa is involved in the functional verification of PCIe controller and PCIe-phy at block, sub-system and MLSoC level. Will also be involved in PCIe bring-up and debug on emulator. Generate required PCIe controller and phy initialization (register programming code sequence) for PCIe bring up in Simulation, emulation and on silicon. Work on UCIe interface verification on next generation projects. Job Description: As the PCIe Design Verification Engineer, you will - Participate in PCIe architecture, micro-architecture, feature discussions and reviews. - Define and develop PCIe test bench components using UVM & System Verilog. - Bring up and testing of PCIe in block and full-chip test environment. - Develop and execute a test plan. - Verification execution of PCIe EP/RC functionality and performance measurements. - Lead Code coverage reviews and closure. System Verilog Assertion functional coverage development and closure. - Manage debug of test and regression...