Mixed-Signal Design Verification Engineer | Custom

Job description

We are seeking a talented Mixed-Signal Design Verification Engineer with experience in verifying high-speed wireline communications and clock/data paths . Come be a part of an exciting Top-Level Design Verification (TLDV) Team in the ACS product line, which develops cutting-edge ASSP ICs. The TLDV team builds automated AMS and DMS testbenches to verify logical functionality, electrical parameters, performance and reliability of custom high-volume chips. While doing that, we strive for continuous improvement in our tools and methodologies, and believe in teamwork and having fun. This individual will: - Execute the pre-silicon verification of complex mixed-signal IC products. Build testbench and automation solutions that are scalable and that support DMS and AMS stimulus and checkers to verify DUT behavior before tapeout. - Verify high-speed clock and data paths (clock/data recovery, timing, serialization/de-serialization, PLLs, DLLs) such as USB, eUSB, SerDes and other wireline protocols. - Verify the design to work according to the datasheet, VVCM, system-level use cases, design-for-test features, and usability from a customer and bench/ATE perspective. - Work with the design teams...