MTS Digital Engineering

Job description

Overview As a New College Graduate Design Engineer, the full-time position candidate will be responsible for specifying, architecting, implementing, and simulating RTL components. The individual will work closely with specification developers, digital & analog designers, and physical design teams to realize efficient and highest performance designs. The position is for DDR5 and DDR6 enterprise-class memory interface products to grow the Memory Interface Chip Business Unit. Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work. Responsibilities: - Develop system Verilog RTL IP, logic, and state machines for next generation products - Perform block level design integration and block level simulations to qualify behavior - Document design implementation with descriptions and functional diagrams - Estimate and track power, performance, area (PPA) tradeoffs for RTL designs - Collaborate with design team members individually and in group meetings to track status and ensure design implementation achieves desired outcomes -...