RTL Design Engineer, Multimedia and Machine Learning Accelerators

Job description

Minimum qualifications: - Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. - 8 years of experience designing RTL digital logic using SystemVerilog for FPGA/Application-Specific Integrated Circuits (ASICs) or equivalent practical experience. - Experience with a scripting language such as Perl or Python. - Experience in area, power and performance. Preferred qualifications: - Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture. - Experience implementing Graphics Processing Unit (GPU), Multimedia Intellectual Property (IP)(Camera, Display or COdec) or Machine Learning IP. - Experience with ASIC design methodologies for clock domain checks and reset checks. - Proficiency in scripting languages, C/C++ programming and software design skills. About the job: Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generati...