Distinguished Engineer - Memory Subsystem Center of Excellence (CoE), Custom Silicon

Job description

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact: The Distinguished Engineer, Memory Subsystem CoE is the senior-most technical authority responsible for end‑to‑end technical ownership of memory subsystems across all programs, customers, and SoCs. This role serves as the single technical point of accountability from architecture through post‑silicon validation and customer engagement. The Chief Engineer ensures delivery of platform‑ready, reusable memory subsystems spanning DDR4/DDR5, LPDDR5/5X, and HBM4/HBM4e, aligned to JEDEC standards and long‑term product roadmaps. The role partners closely with Architecture, SoC teams, PCIe/Ethernet/Security CoEs, PHY vend...