Static Timing Analysis Manager, Full Chip, SOC, Implementation

Job description

Minimum qualifications: - Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. - 10 years of experience with silicon implementation and chip integration. - Experience with STA sign-off constraint authoring for full-chip level, tapeout sign-off requirements, checklists, and associated automation. - 3 years of experience in people management, developing employees. - Experience delivering silicon. Preferred qualifications: - Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture. - Experience in extraction of design parameters, QoR metrics, and analyzing data trends with the knowledge of semiconductor device physics and transistor characteristics. - Experience in engineering across physical design, top-level implementation, GDS tape-out. - Ability to deliver silicon in advanced technology process nodes. - Ability to lead cross-functional teams. About the job: Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to th...