Digital Design RTL Engineer

Job description

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Responsibilities include: Operate with a high degree of autonomy, taking designs from initial specification through to timing closure and physical design hand-off Collaborate cross-functionally with Architecture, Verification, and Physical Design teams to mitigate risks and ensure project milestones are met on schedule High proficiency in SystemVerilog: Proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of PPA optimization, clock domain crossing (CDC) analysis, and low-power design techniques. Experience: BSEE required, MSEE/PHD preferred 5+ years of industry experience with a focus on SoC integration, LPDDR5/6, DDR4/5 and/or high-speed SerDes, or HBM protocols is highly preferred. Additional Job Description: Compensation and Benefits The annual base salary range for this position is $ 91,000 - $146,000 . As a valued member of our team, you'll be eligib...