Chip Package Signal and Power Integrity Lead

Job description

Minimum qualifications: - Bachelor's degree in Electrical Engineering, a related degree, or equivalent practical experience. - 10 years of experience in Signal and Power Integrity (SIPI) modeling and analysis across the chip–package–board system. - 6 years of experience in people management in technical organizations in IC packaging environments. - Experience in high-performance packages (e.g., FCBGA, FCCSP, coreless substrate, chiplet-based, 2.5D architectures). Preferred qualifications: - Ph.D in Electrical Engineering, Computer Engineering or equivalent practical experience. - 15 years of experience in power integrity and signal integrity field. - Experience in PDN modeling and simulation, with experience in PMIC design and modeling. - Experience in LPDDR and High speed IO (e.g., UFS, MIPI, PCIE, USB) modeling and simulation. - Experience with EDA tools (e.g., Ansys HFSS, Q3D, SiWave, Cadence PowerSI, Clarity, PowerDC, Allegro, APD, Spectre, Keysight ADS, Synopsys Hspice). - Knowledge of on-chip power analysis flow (e.g., PTPX, Redhawk, Voltus), SoC physical design (e.g. floor plan). About the job: Be part of a team that pushes boundaries, developing custom silicon solutions tha...