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Physical Design Timing Engineer

Intel · Chandler, Arizona, US

Job Description: As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance and efficiency of cutting-edge DDRPHY IP design.

Job description

Job Details: Job Description: As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance and efficiency of cutting-edge DDRPHY IP design. Your expertise in timing analysis, optimization, and clock network design will directly contribute to delivering high-performance, low-power solutions that drive Intel's innovative products forward. Working at the intersection of architecture, logic design, and physical design, you will have the unique opportunity to influence methodologies, ensure design robustness, and optimize power and performance, making a meaningful impact on Intel's industry-leading technologies. Qualifications: You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. - Perform chip/block-level timing analysis and optimization for IP, identifying and resolving violations to ensure functionality and performance target...